Electrical information storage system



Oct. 3,- 1961 K. c. PERKINS ELECTRICAL TNFoRMATToN STORAGE SYSTEM 3Sheets-Sheet 1 Filed April 29, 1955 Oct. 3, 1961 K. c. PERKINS 3,003,139

ELECTRICAL INFORMATION STORAGE SYSTEM Filed April 29. 1955 ssheets-sheet 2 IN VEN TOR.

22e KNQETH C, PERKINS \22e BY TTORNEY Oct. 3, 1961 K. c. PERKINS3,003,139

ELECTRICAL INFORMATION STORAGE SYSTEM 3 Sheets-Sheet 3 Filed April 29,1955 T0 X DRIVERS TO Y DRIVERS IN VEN TOR.

KENNETH c. PERK|NS Y AT ORNEY y adsense ELECTEECAL INFGRMATIN STR'AGESYS'iv'Elt/l' Kenneth C. Perkins, Lynnfiel'd', Mass., assigner toGeneral Electronic Laboratories, liuc., Cambridge, Mass., a corporationof Massachusetts' Filed Apr. 29, 1955', Ser. No. 504,8314 9 Claims. (Cl.34e-17d) This invention relates to electrical information storagesystems and particularly to magnetic memory core systems wherein thestored informationv may be read repetitively any desired number oftimes.A without. being` destroyed. l

In` the: past, magnetic core type information storage systems havenecessitated bytheir'method of operation, the destruction oftheinformation stored thereiniwhenf ever the stored information' was readfrom. the. system. Thus, any infomation stored in the system. wascapable of giving only one reference reading. In those applica,- tionswhere it was desirable to make useA of the. stored information morevthan a singletime, itwasI necessary to insert the same information intothe system after each reading. Such an arrangement is cumbersome andinadequate for applicationsl requiring more than a. single reference tothe stored information.

Pursuant to the` present inventiom an informatioustorage system has beendevised wherein the. stored information may be retained for readyreference without being impaired,l regardless of the number. of, timesthe: stored information has been read. therefrom. Therefor, a primaryobject of the present. invention is the provisionI of a non-destructivereadout, magnetic memory coreV iuformation storage system.

Another object is theA provision ofi a system, in which information maybeV stored'. for longE periods of timer with'- out loss or impairment.

A further object. is the provision of a system which may be readilycleared of old information when desired'.

Still `another object. is the provision of a system into which newinformation may bereadily inserted for storage and ready reference..

A still further object is the provision of a system for the storage ofinformation which lends itself to ready expansion to accommodateincreasedA quantities of information. Y l

Another object is the provisionof'a system usingl binary coded. wordswith aA minimum of circuitry required to reachy individual4 digits ofselected Words in the system.

Another object ofthe present invention is the provision of a systemwhichY may be operated with relatively small current values and whichthereby4 achieves relatively simple and inexpensive power supplyequipment for driving information and other operating currents throughthe system.

These objects, features and advantages are achieved generally byproviding a magnetic core. with a substantially square hysteresis loopcharacteristic for each of the digits in the system, a writing circuitarrangement inductively coupled to the core for selectively changing themagnetic state of the core to" a maximum residual state in one directiono'r toapproXima-tely Z/ maximum residual state in the oppositedirection` to designate a zero and a one respectively inA binary; code.inl the core, a clearing circuit inductively coupledl to the core for:changing the magnetic state ofthe; core to amaximum residual.A state insaid opposite direction to provide a cleared condition for the core,vaud a reading circuit arrangement iuductively coupled tothe core havingapproximately the fluxchanging strengthV of the write onef circuitarrangement for reading excitationof the. core, and a. sensing circuitinductively coupled to the core for determining' the core response to.-the reading. excitation.

te States fr By-makingthewriting circuit arrangement in the form of twocircuits inductively coupled to the core with each. circuit carryinghalf the required ampere turns for changiug'themagnetic state toa'maxitnum. in the one direction, one of the'circuits may thereby beused for the dual pu'r pose of both assisting in the writing operationas well` as thereadingoperation.

By providing a reference, core similar to the memory core and` adaptingit inthe circuit to be in a maximum residualrnagnetic state in the onedirection and comparing response from the reference corel due toreading: eXf citation with the response from the. information core fromthe; same reading excitation, noise factors are,I minimized andinformation readings are enhanced.

By providing each. endVv of theV clearing, writing and reading circuitswith grid-controlledv electron-tube driver circuits simultaneouslytriggered by control pulses, posi? tive control ofthe magnetic state ofthe core of.` each digitis. assured.

By makingone of t.e grid-controlled electronftubes a. pentode having, aconstant, current characteristic over awlde range of. voltages in thedriving circuit, closeA con.- trol'y of.readingwritingand clearing.currents is achieved. By grounding the output end of thev other gridcontrolled electron tube through a diode, the maintenanceof a stablepotential' in the respectiveflineis achieved'.

By using. word groups. and providing a single input line for the.clearing circuit andsingle input line for the writing circuit running tothe corresponding,l word ofeach of the groups and providing one returnvline, for all the words in a single group, additional word groups may beadded as desired bymerely adding an additional return line for theVadded word group. This utilizes the existing input. lines and therebypermits additions for adaptation to` increased information requirementswith minimumincreases in circuitsrequired'.

By providing av differentiall sensing electron tube arrangementoperating substantially as a cathode follower for comparing referencecore output with information core output, a relatively simplearrangement for obtaining. positive information readings from'A thememory cores i`s achieved;

FThese and other features,4 objects and advantages of the presentinvention will become more apparent from the following description takenin connection with the accompanying, drawings' of an exemplaryembodiment of the invention wherein l FlG. l is a partly schematic andpartly block diagram showing an information storage system operatingYwith two words oflthree digits each.. Y

FIG.A 2 is a schematic diagram of an X driver circuit suitable for usein the system disclosed in FIG. l.

FIG. 3 is a schematic view of a Y and a Z driver circuit suitable foruse in the system disclosed in FIG. l.

FIG. 4 is a schematic diagram of a differential sensing amplifiersuitable for use in the system disclosed in FIG'. l.

FIG.. 5 is a diagram illustrating the applicability of the presentinvention to additions of word groups for increased informationalrequirements.

FIG. 6 is a diagram showing a representative` hysteresis loopcharacteristic in the. magnetic memory cores used' in FIGL 1.

FG. is an. illustrative curve of magneticv field in'- tensity versustime for use with. the hysteresis curve in FIG. 6 to more clearlyillustrate the operation of the embodiment disclosed in FIG. 1.

Referring to FIG. 1, the exemplary magnetic memory core informationstorage system is designated generally byV the numeral ll'. Theinformation storage system l contains words 2 and 3. The word 2 iscomprised of three. magnetic memory cores 4, 5 and 6, each represent- 3ing a digit in the word 2. It also contains a magnetic reference core 7.The cores 4, 5, 6 and 7 are similar and embody a square type hysteresisloop characteristic such as shown by the curve S in FIG. 6 where the Haxis represents the magnetic field intensity and the vertical B axis theflux density.

The word 3 also consists of three magnetic cores 9, 10, and 11, eachrepresenting one digit in the word 3. The word 3 also has a referencecore 12. The cores 9, 1G, 11 and 12 are preferably the same as the coresin the word 2. By way of example, a core found suitable for the presentembodiment is of toroidal shape commercially designated as Ferramic typeS-l, Die size F-303 which is available from the General Ceramics Corp.While this core has been found suitable for the present embodiment othertypes and sizes of magnetic cores may also be used for this purpose.

' All of the cores 4, 5, 6 and 7 in the word 2 have inductive windings13, 14, 15 and 16 respectively connected in series by a line 17. Theline 17 is connected at one end through a unidirectional current valveas a crystal 18 and a line 19 to one side of an information clearing Xdriver circuit 20. The othre side of the X driver 20 is connected by aline 21 through a normally open switch 22 to a pulse former 24. Asuitable X driver circuit 2G is shown in FIG. 2 which will behereinafter more fully described. The pulse former 24 may be aconventional pulse forming circuit, preferably with a square type pulseas will be hereinafter described.

The other end of the line 17 is connected through a line 26 to one sideof a Y driver circuit 28, the other side lof which is connected througha line 3f) and normally :open switch 32 and a line 34 to the pulseformer 24.

. Similarly the magnetic cores 9, 10, 11 and 12 in the word 3 haveinductive windings 35, 36, 37 and 38 respectively connected in series bya line 39. All of the inductive windings 13, 14, 15, 16, 35, 36, 37 and38 are preferably the same in that they have the same number of turns,however, the windings 16 and 38 on the reference cores 7 and 12 arewound in the opposite direction to crystal 18 to a line 41. The line 41is connected to `one side of a clearing X driver circuit 42, the otherside Aof which is connected through a line 43 and a normally open switch44 to the pulse former 24. The clearing X driver 42 may be similar tothe X driver 20.

The other end of the line 39 is connected to the line 26 in similarmanner to the line 17.

Each of the cores 4, 5, 6 and 7 in the word 2 is provided with anotherinductive winding 45, 46, 4'7 and 4S respectively. The windings 45, 46,47 and 48 in the present embodiment, have half the number of turns ofthe windings 13, 14, 15, and 16 in order to provide half the ampere turnvalue of the windings 13, 14, 15 and 16. Also, the windings 45, 46, 47and 48 are wound upon the respective cores in the opposite directionfrom that of the windings 13, 14 and 15.

The windings 45, 46, 47 and 48 are connected in series by a line 49, oneend of which is connected through a unidirectional current device ascrystal 50 and a line 51 to one side of a read-write X driver circuit52, the other side of which is connected through a line 53 and anormally open switch 54 to the pulse former 24. The X driver 52 may besimilar to the X driver 2t). The other end of the line 49 is connectedto the line 26 in manner similar to the line 17.

In similar manner, the cores 9, 10, 11 and 12 of the word 3 are eachprovided with another inductive winding 56, S, 60 and 62 respectively,having half the number of turns as the windings 35, 36, 37 and 38 toprovide half the ampere turn value of the latter windings. The windings56, 58, 60 and 62 are also wound about the respective cores in theopposite direction to that of the windings 35, 36 and 37. The windings56, 58, 60 and 62 are connected in series by a line 64, one end of whichis connected through a unidirectional current device such as a crystal66 similar to the crystal 13 and a line 68 to one side of a read-write Xdriver 70, the other side of which is connected through a line 72 and anormally open switch 74 to the pulse former 24. The other end of theline 64 is connected to the line 26 in similar manner to the line 17.

Each of the digit memory cores 4, 5, 6, 9, 10 and 11 is supplied with athird winding 75, 76, 77, 78, 79 and S0 respectively. Each of thewindings 75, 76, 77, 78, 79 and Sii has the same number of turns and iswound in the same sense as the windings 45, 46, 47, 56, 58 and 6). Thewindings 75 and 78 are connected in series by a line 82, one end ofwhich is connected to one side of a Z write driver 84, the other side ofwhich is connected through line 36 and a normally open switch 8S to theline 54. The other end of the line 82 is connected to ground.

The windings 76 and 79 are connected in series by a line 90, one end ofwhich is connected to one side of a Z write driver 91, the other side ofwhich is connected through a linel 92 and a normally open switch 94 tothe line 34. The other end of the line 9i) is connected to ground. The Zwrite driver 91 may be similar to the Z write driver 84 and the Y driver28, to be hereinafter described.

The windings 77 and 80 are connected in series by a line 96, one end ofwhich is connected to one side of a Z write driver 98, the other side ofwhich is connected through aline and a normally open switch 162 to theline 34. The other end of the line 96 is connected to ground. The Zwrite driver Q8 may be similar to Z write driver 91 and Y driver 23.

It will be noted that the lines 82, 90 and 96 inductively couple the Zwrite driver circuits in series with the ccrrespending digit in eachrespective word in the system.

Each of the magnetic cores 4, 5, 6, 7, 9, 10, 11 and l2 is also providedwith a further inductive winding 164, 166, 103, 110, 112, 114, 116 and116 respectively. Each of these windings is a sensing winding for therespective magnetic core. The windings 116, and 118 are connected vinseries by a line 126, one end of which is connected through a line 121and a line 122 to one side of a differential sensing amplifier 124, theother side of which is connected through a line 126 to an indicator 128.A

differential sensing amplifier circuit suitable for use at 124 is shownin FIG. 4 and will be hereinafter described. The indicator 123 may beany suitable indicator such as a neon glow tube arrangement. The otherend of line is connected to ground.

The sensing windings 164 and 112 are connected in series by a line 131i,one end o f which is connected to the differential sensing amplier 124.The other end of line is connected to ground.

The sensing windings 106 and 114 are connected in series by a line 132,one end of which is connected to a differential sensing amplifier 134.The diderential sensing amplifier 134 is also connected through a line136 to an indicator 138 such as the indicator 128. The line 121 is alsoconnected to the differential sensing amplifier 134 by a line '149 inmanner similar to that in the differential sensing amplifier 124. Theother end of the line 132 is connected to ground.

The sensing windings 153 and 116 are connected in series by a line 142,one end of which is connected to a differential sensing amplifier 144which in turn is connected through a line 146 to an indicator 148similar to the indicators 128 and 138. The liuc 12,1 is also connectedto the differential sensing amplifier 144. The other end of the line 142is connected to ground.

It will be noted that the sensing lines 120, 130, 132 and 142 connectthe sensing windings Yof the reference cores nuestras:

nci.` of corre'spendingI digits int the respective words in". series.

' Referring to' FIG. 2, the: X.. clearing driver circuit: is*designatedgenerally by the.1 numeral 20 (FIGS..1 endl). The X driver 261has ai beam .tetrode 156 having.y an.. anode 1552;v connected through aline` 1542 to the positive terminal of a power source such. as a battery156, the negativeV terminal of which is connected. to ground.Ehe-cathode 158 of the pentode 150 is connected through a line. 160' anda' unidirectional current device' as a diode 162 to ground. A -bea'mforming electrode toa in the tetrod'e lflisv tied back to the cathode153. The. screen grid 166` conectedto the anode-1:52'. Control grid loS.of the tetidde hV is connected bya line 170 through a-capacitor 1752 tothe line 2i (FIG: 1l). Line 2l. is. connected throuigha leakage resistorl'ldt'o ground; Line t. lead:- ing to"v control grid. is connected'.through. a bias resistor W6- to a source of negative. biasing potential.such. as the negative terminal of. a battery 1578, the-positive.terminal otwliich is connected to ground.. The line loo frornthe cathode158'- is connected to the linei9 (FIG. l7 FG. 2). will be noted that theX driver 2d is suitable for. useas the X driver 52', 42, 7th

` Ih FIG; 3`, theY driver'. is shown' generally by the nu meral 28?(FIGS. l and 3).- Y driver 28 has' a pentode 180E having an anode- 1-82connected to the line .26' and a cathode .184 connected by a line 13d tothe negative terminal of a power source such as a1 battery 188. Asuppressor grid 190 of the pentode tao is tied'. back. to the cathode1854'. Screen grid` 192 Iis connected to ground. Qontrol grid 194 iscorniected through a une 19e and a capacitor 19% `to the' line 30 (FIGS.l' and 31). The line 3d is connected through a leakage resistor 20) toground. Iin'e 196' is connected through a bias resistor 202 to anegative biasing potential source suchlas' the negative ter. initial ofa battery' 2&4, the positive terminal of: which is connected to` ground.The Y driver 28 is; also' suitable for'vuse" a's the Z driver 845, 91and 98.

" A differential sensing ampliiier circuit suitable for-'use inx FIG. l.isV designatedV generally in. FIG. 4` `by ythe nutmeral 124 (FIGS. l'and 4).- The differential. sensing amplier 124 has two triodes 2% and298 which may be in a single envelope. The triode 20o has an anode 210connected* through a parallel connected resistor 2i2 and capacitor 213tothe positive terminal of a potential power source `such as a battery'214, the negative terminal of which' is connected to ground. Similarly,anode 216 of the? triode 208 is connected through a resistor 213 to thepositive terminal of battery 21d'. Cathode 22o of.Y the triode 20o andcathode 222 of the triode 203 are connected through a common' resistor224, line 226 and a resistor 22S to ground". Control grid 230 of thetriode 'Zlio is connectedv through a line 232 and a capacitor 234 to'the line 13d (FIGS. l and 4). Line 2312 is connected through aresistor'23o, the line 226 and resistor 22e` to lgflt'l'l-Ilcl'.

Control grid 238 in the triode 2tlg isv connected through a line` 240iand a' capacitor' 242 to the line 122 (FIGS. 1- and 4)'. The line 126(FIGS. l and 4) leading-to indica-tor 1128 is connected tothe anode 2116of the tiiode 208.

' lli oper-ation, to clear the magnetic cores in the word 2, thenormally open switches 22 and 32 are closed. This causes' a positivebiasing pulse 244 from the pulse former 24 to appear simultaneouslythrough line 21, capacitor 1:72:` and line' itl at the control grid 168of the pentode 150' (FIGS. l and 2)r and through. line 34, lirl'e 3G,Capacit'or HS, line io at the control grid 194 of the pentode ld (FIGS.l and 3) inv the X clearing driver 2d and the Y driver 2S respectively.Pulse 244' is of an ariiplitude such as will drive the control grids lodand v192i positive to malle the pentodes 15h and ide suiand line 26.Pulse 244' .is designed to have a sucie'nt voltage magnitude tocausefthe' cument. magnitude inthe windings: 16, 13,. 14 and 15 todrivev the digit` cores 4; 5 and' 6i respectively to saturation in onedirection represented by the point 246 on the hysteresis. curve. 3 (FIG.6)'. This driving effect. ist a function of the ampere: turns in therespective windings and for this clearing operation may be designated bythe magneticV intensity curve portionv 2455V (FIG. 7) which. correspondsin` duration tothe current pulse caused by the voltage pulse 24A- (FIG.1). At. the termination of the pulse 244, the clearing., current` in.line 17 will drop to zero. shownat- 25il on the magnetic intensity curvein FIG. 7 andthe residual. magnetic state of the digit. cores d, 5; ando will be at a maximum as represented by the. point` 249- on the.hysteresis curve d in FlG. 6. `It willi be noted that whereas the memorycores 4 5A and. 6 are. left thereby' in a magnetic stateY designated bytheV point 249., the reference core 7v will by the sante pulse.. have.been placed in a maximum. residual magnetic stateY having. an. oppositedirection and designated by the point 252 on the hysteresis curve 8; Thereason. for this is that the Winding 16 on the reference core 7 is Woundinthe opposite sensev from the windings 13, vliliand l5 respectively..

While a single pulse 24d is sufficient to place the memory cores inthecleared condition iust described, the occurrence of several clearingpulses 24d in the clearing operation are notv harm-ful in that thecleared residual state of the cores will still remain the. same.

Upon. clearing the cores as described above, the switches 22 and 32 `areopenedv and the Word 2 is then ready for the writing? operation. isi'performed in binary code. Thus each coreY represents a; digit iny the.code and. the information at each. digit maybe'designated as.- a Zero orai one dependinguponthe. magnetic statey of the core'. Two diierent anddistinct magnetic states for the memory' cores have been found desirablefor: use in the present nondestructive read-out' system., They arearbitrarily labeled. herein as. the one state andi. the zero state.

For exampleto writev a one inthe core'.- d, the switch 54 andthe switch32 are closed. Thisl will cause a pulse 260 (FIG. l) similar to pulse244 to appear simub taneously at the control. grid of theV X driver 52'and. the control grid :19d of the Y driver 28 to' thereby cause acurrent to iiow in the winding d5' in similar manner to that explainedabove `for the clearing operation.V Since the X driver 52 is the same asthe X driver 2t), the current in the winding 45 will be substantiallyof: the same magnitude as that previously in .the winding 13'. However,the winding d5 having 1/2 the number of turns as the winding i3, themagnetic intensity created' thereby will be of approximately 1/2 theyvalue of4 that caused by the current in lthe winding, l2. Because thewinding 45 is wou-nd in the opposite direction to wind-ing 13 thismagnetic intensity will also be in a direction opposite to that createdby the current in winding 113 and is shown by the dat portion 253 ofthemagnetic intensity curvef in FIG. 7. This magnetic intensity willchangev the magneticV state of the core 4 from its residual. maximumdesignated by the point 249 (FIG. 6) to somey intermediate point 254 onthe steep por-tion of. the hysteresis curve S. Upon the termination ofthe writing pulse 260, the magneticA state of the core d will fall bacltto a state of magnetism designated approximately by point 25o at` zeromagnetic intensity corresponding to the; portion 25S of the curve inFIG. 7.

It has been foundv that more thanv two pulses 260 will not materiallychangek the residual magnetic state of the core 4 from the position 256.Having written the one in the core 4, the switch 54 is opened and theone information in the core 4 is stored therein ready for repetitivereading without destruction of the stored one 'Ilo read the informationin the core 4, switch 54 and switch 32 (FIG. 1i) are again closed toithereby cause a. reading. pulse which is identical to thev pulse 26dv tosimultaneously appear at the control grids in the X driver 52 and the Ydriver 28 respectively and thereby cause a current to flow through thewinding 48 of the reference core 7 and the winding 45 of the informationcore 4 in the same manner as described with regard to writing one above.'I'he magnetic intensity caused by the current from the reading pulse isshown by the portion 262 of the magnetic intensity curve in FIG. 7.During the flow of this reading current, the magnetic state of core 4will follow a path substantially from point 256 to a point 264 on thehysteresis curve 8. The reference core which has been in a residualmagnetic state designated by the point 252 from the previously mentionedclearing pulse will follow the flat portion of the hysteresis loop 8 toa point 266. Since the reference core 7 follows a path from 252 to 266which is substantially ilat, there is very little change in magneticflux caused thereby in the core 7. Therefor, there will be very littleinduced voltage in the sensing winding 110. Thus only a very smallbiasing voltage pulse 267 (FIGS. 1 and 4) will occur through lines 120,121 and 122 at the control grid 238 in the triode 208 (FIG. 4).

On the other hand, the magnetic state of the core 4 will pass from thepoint 256 to the point 264 on the hysteresis curve 8. This will cause aux change substantially larger than that of the reference core describedabove. This change in the magnetic state of core 4 will induce a voltagepulse 268 (FIGS. 1 and 4) in the line 130. The pulse 268 will appear atthe control grid 230 of the triode 266 (FIG. 4) and will cause a similarpulse 270 to appear at cathode 220. Since the cathode 220 is connectedby a common line to the cathode 222, the pulse 270 will appear at thecathode 222 also. The simultaneous appearance of pulse 270 at cathode222 and the small pulse 267 at the control grid 238 will result in apulse 272 at the anode 216 and thereby in the output line 126 running tothe indicator 128. The pulse 272 will have an amplitude approximatelyequal to the difference between the pulse 268 and 267. If the indicator128 used is a neon tube, the pulse 272 Will make the neon tube glow toindicate the reading of a one from the memory core 4.

It will be noted that the reading of the one in the memory core 4 didnot change the residual state of magnetism in the memory core 4 andtherefor the one remains stored therein for as many similar futurereadings of the memory core 4 as may be desired. The magnetic state ofthe memory core 4 will vary between points 256 and 264 (FIG. 6) on thehysteresis curve 8 during subsequent read pulses and may be designatedby the portion 273 on the magnetic intensity curve in FIG. 7.

If it becomes desirable to write a zero into the memory core 4, the core4 is rst cleared by a pulse 244 as explained above to produce acorresponding clearing cycle designated by the numeral 274 on themagnetic intensity curve in FIG. 7 and similar to the cycle 248explained above.

After this clearing operation, the residual state of the `memory core 4will again have a direction and magnitude corresponding to the point 249on the hysteresis curve 8 in FIG. 6. To write the zero into the memorycore 4, the three switches 54, 88 and 32 are closed (FIG. 1). Theclosingof switch 88 will cause a voltage pulse 251 similar to pulse 244 toappear at the control grid in the Z driver 84 and thereby acorresponding current pulse to ow through the winding 75. Similarlyclosing of switches 54 and 32 causes simultaneous current pulse throughthe winding 45 on the core 4. The windings 75 and 45 have substantiallythe same number of turns and are wound on the core 4 in the same sense.The current through the respective Winding 75 and 45, thereby, have acumulative eifect upon the memory core 4 such as to create a magneticintensity cycle 276 on the magnetic intensity curve in FIG. 7. Thiswrite zero cycle magnetic intensity yis sufficient to'drive the memorycore 4 to saturation in the positive direction indicated by the point278 on the hysteresis curve 8 in FIG. 6. After the wnite zero pulses inthe windings 75 and 45, the core 4 will be left with a residual state ofmagnetism indicated by point 252 on the hysteresis curve 8 in FIG. 6.This residual magnetic state in the memory core 4 is the zeroinformation state. The switches 54, 88 and 32 may then be opened toleave this zero information stored in the memory core 4.

Reading the zero from the core 4 is performed in a similar manner toreading the stored one from the core 4 as explained above. That is, byclosing the switch 54 and the switch 32 to cause thereby a reading pulsesimilar to the pulse 260 to cause a reading current to pass through thewinding 48 in the reference core 7 and through the Winding 45 in thememory core 4. Since the magnetic state of the memory core 4 for a Zerois the same as the magnetic state of the reference core 7, the readingpulse in the windings 48 and 45 will cause only similar small inducedpulses in the sensing windings and 104 (FIG. 1) respectively. Thesesmall induced voltage pulses will be of the same amplitude. One willappear at the cathode 222 in manner similar to that explained above withregard to the read one pulse 268. The other will appear at the controlgrid 2318 in manner similar to the pulse 267 explained above. Sincethese pulses are of the same magnitude, they will tend to cancel eachother so that there will be substantially no voltage change in theoutput line 126, and therefor, will cause no change in indication at theindicator 128. No change at the indicator 128 on the insertion of a readpulse, becomes indicative of the reading of a zero in the memory core 4.

With the zero residual magnetic state of the memory core 44 at the point252 on the hysteresis curve 8, the read magnetic intensity changeindicated at 280 in FIG. 7 causes the magnetic state of vmemory core 4to change from point 252 along the at portion of the hysteresis curve 8to the point 266 and back to the point 252. Thus it is seen that thestored zero information remains unchanged and undestroyed in the memorycore 4. Any vsubsequent read pulse indicated at 282 on the magneticintensity curve in FIG. 7 may be repeated as often as desired withoutchanging the stored zero information in the memory core 4.

In similar` manner, the memory cores 5 and 6 may be cleared by closingthe switch 22 and the switch 32. A one may be written into all of thememory cores 4, 5 and 6 simultaneously by closing the switch 54 and theswitch 32. In those of the memory cores 4, 5 and 6 in which a zero isdesired to be stored, each of the selected switches 88, 94 and 162 forthe respective memory core selected is also closed at the same time thatthe switch 54 is closed. Thereby, as explained above, in those selectedmemory cores which have both a Z write and and X write driver switchclosed will register a zero rather than a one Likewise, after thedesired information is stored in the memory cores 4, 5 and 6, thisinformation may be read from these cores simultaneously at theirrespective indicators 128, 138 and 148 by closing the switches 54 and 32to pass a reading pulse 260 through the windings 45, 46 and 47 on thememory cores.

Information may be stored and read from the word 3 in manner similar tothat described with regard to the word 2, except that to select the word3, the switches 44 and 74 are used in place of the switches 22 and 54.

While in FIG. 1, for illustrative purposes, only two words 2 and 3 areshown, the present system is suited for an increased number of wordswith a minimum number o-f `additional circuits involved. The circuitarrangement for increased number of words is shown schematically in FIG.5 where the memory cores, the X, Y and Z drivers, the differentialsensing amplifiers and indicators are omitted for clarity in showing thecircuit arrangement. The corresponding vlinesfer the two words shown inFIG. 1 appear in FIG. 5 at the -left portion of the diagram. It will benoted thatthe system in the` present invention utilizes individual wordgroups; Four such word groups 284, 286, 288 and 290 are represented inFIG.. 5. Thev word group 234 contains four' words of which' the iirsttwo are the words 2 and 3 described with regardl to FIG. l and also thewords 292 and 294; Each Word contains a pair of lines, one line for thec'learingcircuit such as line 17 in the wordV 2 and one line rior. thereadwrite circuit such as the line 49 in the word 2. Words 3, 292and 294in the word .group 284 each have clearing lines 39, 296 and 29Srespectively;` and',rea'diwrit'e lines 64, 300, and 302 respectively.

The word group 286, similarly, has clearing linesl 304, 306,v 308 and31a; and read-write linesY 312, 314', 316 and 318; A pair of these linesis provided for each ofthe respective tour wordsV in the group.Similarly the word groupI 238 has clearing lines 320, 322 324 andl 326i;and read-write lines 32S, 33), 332' and 334 with aipairfotw these linesfor each of the four wordsin the group. Likewise, the word group 290has. clearing, lines' 336', 38-, 340 and 3'42, and read-write lines'344, 346,` 348fan'd 350'Y with a pair of lines for each of the fourwordsVv inthe group:

All of the clearing and read-write lines have unidirectional currentdevices therein as crystals' 1'8, 50, 40' and tia-in lines 17, 49, 39and 64 respectively, top'revent stray currents reaching individualWords'. The remaining crystalsv in the respective lines are numbered352t'o indicate flcirsimilarity to each otherr and to: crystals 18140l and66 Itwill be noted that; each word group hasta common Y' driver. Thustheword group 284'lia's the common lY dver 28. On the other hand each Wordin a group has a. separate X clear driver and a separate X read-'writedriver for the respective clearing andreadwrit'e line in the` word. Forexample,` the word 2 has the X'y clear driver 20 for the clearing line17fand"the Xread-'write driver` 52 -for the read-write line 49. Eachv.of the other words in the group 234 has its own Xclear driver andI Xread-Write driver for the respective clearing and readwrite lines. l

But the successive Word groups as 286,288 and 2&0 may have theircorresponding words in the group connected to the same X. clear. driverandthe same.` X read write drive. For example, the Xcleardiver 20is.oommonto the clearing line. 17 in .Wordz2. as- Well as thev clearingVllines 364, 320, ande in, theiii'itst' werdet` thev respective wordgroups. 284, 286 and.29U.` Likewise,` tlie X read-write driver 52 iscommonto read-write lines 49, 312, 328 and 344 in the iirst word of"eachof the respective word groups 284, 286, 28i8-and"2.79lltv'IhisarrangementY succeeds in havingy a relativelyv large numberv ofwords with a relatively small number of X and Y drivers; Thus, itreduces the bulkiness aswell asf'cost of the'l system and at the sametime achieves easy accessibility to any'selected word in any'selecte'dwordt group:

While FG. 1 for illustrative purposes shows onlythree digits, a largernumber of digits may be used. The number of digits in any word may Ibeincreased by adding an additional memory core with corresponding Zdriver, differential sensing amplilier and indicator circuit for each ofthe added digits.

With the Ferramic type S-1 memory core described above, the presentembodiment succeeds in operating with small currents such as 100milliamperes through the respective read-write and clearing lines. Tocompensate for the diminutive size of the current, the respective memoryand reference cores are wound for a one ampere turn for reading and twoampere turns for clearing. Thus in the word 2 the windings 16, 13, 14and 1S have twenty turns each, while the windings 48, 45, 46, 47, 75, 76and 77 have ten turns each. The sensing windings 110, 104, 106 and 108have one turn each. By using this arrangement and diminutive currents,the driving said corel to a preselected residual magnetic referencelstate of one polarity, a pair of writing and reading means. coupled tosaid core, each for subjecting saidl core toV a. magnetic. fieldintensity ofA opposite polarity from said, one, the magnetic fieldintensity of each means of said'.

10 circuitry is simplified in that only small" arrears 'are-1in@ volved.However, this combination of currents and size of core, and numberl ofturns in the windings arevcited here for illustrative purposes only andmay be variedto suit individual needs.

While the practical embodiment disclosed herein uses Ia maximum negativeresidual state in the magneti-o core as the starting state from whichboth the one and the zero are written into the core, experimentalresults Show that the residual state lfrom which writing occurs need notbe at the maximum value actually used. l The starting value for writingneed only be at a value below that which is used as the magnetic stateindicating a one Also, the one magnetic state need onlybev any residualstate below the maximum value assigned to the zerc' What is claimed is:

1. In an electrical information storage system, a mag. netic core, asubstantially square hysteresis loop charac teristic in said core,means? inductively coupled to said core for creating in said core amaximum residual state ofmagnetism in one direction, means inductivelycoupled t'o said core -for creating in said corea residual state ofmagnetism between zero and a maximum in said one direction, a secondmagnetic core having a square hys= ter'esis loop characteristic andbeing in one of said last two mentioned residual states of magnetism,and elec` trical circuit means inductively coupled to said cores forcomparing the residual state of magnetismV in said first core to theresidual state of magnetism in s'aid second core.

2'. An electrical information storage system co'xi'ipii's ing, an arrayof magnetic core memory elements, said elements being arranged indigital word groups, each of the words in Ia word group including areference element similar to the memory element, a clearing circuitinductively coupled to each of the elements in a word, a readwritecircuit inductively coupled to each of the elements .in` a word, aWriting circuit inductivel'y coupled to the corresponding element ofeach respective word in each of the word groups, a sensing circuitinductively coupled to the correspondingelement of each respective wordin each of the word groups, and selective means'for comparing the outputof the sensing reference core circuit with. the outputs of therespective digit sensing circuits in aselected word of one of the wordgroups.

3'. In a magnetic memory system, a magnetic core,v

memory clearing means coupled to the core for driving pair. separatelybeing insucieut to change the polarity ofsaid reference residual stateand combined being. of

sufficient intensity to-change said polarity, electrical. signal outputmeans. inductively coupled to said core, electric` referenceA signalmeans, and means coupled to said.

output and reference signal means for comparing the signals in saidoutput and reference signal means.

4. In a magnetic memory system, a magnetic core,. memory clearing meanscoupled to the core for driving lsaid core to substantial saturation anda residual magneticA State of one polarity, a pair of Writing andreading means 11 ,comparing the signals in said output and referencesignal means. y

5. In a magnetic memory system, a magnetic core having a substantiallysquare hysteresis loop characteristic, memory clearing means coupled tothe core for driving `the core to substantial saturation and a residualmagnetic state of one polarity, a pair of writing and reading meanscoupled to said core, each for subjecting said core to a magnetic fieldintensity of opposite polarity from said one, the magnetic fieldintensity of each means of said pair separately being approximately onehalf the intensity required for driving said core to substantialsaturation, electric signal voltage output means inductively coupled tosaid core, electric voltage signal reference means, means vcoupled tosaid output and reference signal means for determining the diierencebetween said output and reference signal voltages, and means forindicating said difference.

6. In a magnetic memory system, a pair of magnetic cores, electriccurrent means coupled to said cores for producing residual magnetism ofknown polarity in said cores, a pair of current means coupled to one ofsaid cores and one of said pair coupled to the other core, each of saidpair for, subjecting said one core to a magnetic field intensity ofopposite polarity from said known polarity, each of said pair separatelybeing insufiicient to change the polarity of the residual magnetism ofsaid one core and combined being of sutlcient intensity to change vsaidpolarity, electric signal output means inductively coupled to saidcores, and means for comparing the signals in said output means.

7. In an apparatus for determining the polarity of residual magnetism ina magnetized core, the combination of a magnetized core and a magnetizedreference core .having substantially identical electricalcharacteristics to the first mentioned core and having a known polarityof magnetization, means for subjecting said magnetized core andmagnetized reference core to a magnetic field intensity of preselectedmagnitude insuiiicient to change substantially the residual magneticstate of said cores, means coupled to said cores for abruptly removingsaid magnetic field intensity, voltage signal induction means coupled to'each of said cores and voltage signal comparing means coupled to saidinduction voltage means for comparing 'the induced voltages therein.

8. A magnetic core having a square hysteresis loop characteristic, avoltage pulse former, a first, a second, a third and a fourth voltagecontrolled constant current drivers, each having an input and outputterminals with the input terminal of each arranged for coupling to thepulse former, a first and a second electric circuits coupled to theoutput of said rst and second drivers respectively and said thirdcurrent driver, an inductive winding in said first circuit inductivelycoupled to said core for creating magnetic flux in said core in onedirection in response to pulses from said voltage pulse former, aninductive winding in said second circuit inductively coupled to saidcore for creating magnetic flux in said core in the opposite directionin response to voltage pulses from said pulse former, a third circuitoperatively connected to the out- 12 put of the fourth current driver,an inductive winding in said third circuit inductively coupled to saidcore for creating a magnetic flux in said core in said oppositedirection in response to voltage pulses from said pulse former, a fourthinductive winding inductively coupled to said core, means coupled tosaid fourth inductive winding for comparing voltages induced in saidfourth inductive Winding to a known reference voltage, and means coupledto said comparing means for indicating said comparison.

9. An electrical information storage system comprising a multiplicity ofsimilar toroidal ferrite magnetic memory cores, each having asubstantially square hysteresis loop characteristic and arranged intogroups with each core representing a digit in the respective group, eachof the groups including a reference core substantially identical to thedigit cores, three inductive windings on each of the reference cores andfour inductive windings on each of the digit cores, one of said windingson each core containing approximately twice the number of turns as eachof the other of said windings and wound on the digit cores in adirection for creating flux opposed to that created by said otherwindings, a first circuit connecting said one winding in each core of agroup for simultaneously clearing said cores in the group of storedinformation, a second circuit for each of the cores in the groupconnecting a second of said windings in each of the cores of the groupfor reading and writing information in said cores, a third circuitcoupled to a fourth winding of a corresponding digit of each group forcooperating with said second winding circuit in writing information intoselected ones of said corresponding digit cores7 a sensing Circuit forthe corresponding cores of each of the groups, the respective sensingcircuit coupled to the third winding of the corresponding core of eachgroup, for sensing information in said cores in response to excitationfrom the reading circuit, means for selectively exciting the clearing,writing and reading circuits with electric current pulses, and meanscoupled to the reference and digit core sensing circuits for indicatingthe difference between the digit and reference core responses in saidsensing circuits.

References Cited in the file of this patent UNITED STATES PATENTS2,614,167 Kamm Oct. 14, 1952 2,691,154 Rajchman Oct. 5, 1954 2,740,949Counihan et al. Apr. 3, 1956 2,774,056 Stafford Dec. ll, 1956 2,832,945Christensen Apr, 29, 1958 OTHER REFERENCES Non-destructive Sensing ofMagnetic Cores, by D. A. Buck and W. I. Frank, Communications andElectronics, pp. 822-830, January 1954.

A New Non-destructive Read for Magnetic Cores," by R. Thorensen and W.R. Arsenault, pp. 111-116, 1955, Western Joint Computer Conference.Conference, March 1 3, 1955.

